Project S05 - Real-Time Massive MIMO THz Computing Architecture

Principal Investigator: Prof. Dr. Diana Göhringer, TUDD ADS

For enabling material localization and characterization on mobile devices under strong realtime and energy constraints, a computing architecture with high energy efficiency is needed. This architecture has to process the THz signals from the Massive Multiple Input Multiple Output (MMIMO) transceiver front-end in real-time and with zero jitter, i.e. cycle-accurate execution of one channel and certainly in relation to the other channels. Jitter would lead to artifacts in the algorithms e.g. for the localization. The main goal of S05 is to investigate holistic concepts for novel scalable real-time computing hardware architectures and programming methods in order to realize an energy-efficient digital signal processing of the algorithms being developed within MARIE. To achieve this goal, S05 closely collaborates with the projects focusing on material localization (S04, C09) and characterization (M04, M05) and those which develop the MIMO transceiver front-end (C03, C01, C02, C05) as well as those which compensate analog non-idealities in a digital manner (S01, S02). The applicability of such a modular and scalable computing architecture and its programming methods for other applications with a demand for acceleration will be explored with the raytracing and finite-differences time-domain algorithms of the simulator framework in collaboration with M02. All these applications depend on the environment, e.g. different characterization algorithms are needed for miscellaneous materials. Therefore, the computing architecture has to be modular and runtime adaptive to achieve at each point in time an energy-efficient solution by time-multiplexing the hardware architecture for the different applications. This results in a multi-objective optimization problem, which is NPhard, and demands novel solutions in terms of computing architecture, such as parameterizable processing elements, on-chip communication modules and memory infrastructure, and programming methodology, such as application modelling and partitioning/mapping/ scheduling algorithms. One main focus in S05 is to guarantee real-time and zero jitter with the novel hardware architecture and its tool flow.

In summary, S05 is crucial to fulfilling challenge 3 and 4 of MARIE in that it focuses on novel concepts for designing and programming a scalable, runtime adaptive, real-time and jitterfree computing architecture under strong limitations in terms of energy, costs and footprint. A large number of relatively close collaborations show the need for S05 even in the first “static” phase of MARIE so as to avoid the development of extreme number crunching algorithms that even in the long term are not feasible on mobile devices.